Title :
Design of image interpretation and data-processing system based on SOPC
Author :
Wang Zhi-qian ; Liu Zhao-rong ; Xie, Mu-jun
Author_Institution :
Dept. of Opt.-Electron. Meas. & Control, Chinese Acad. of Sci., Changchun, China
Abstract :
In order to follow the development of image interpretation and data-processing system in photoelectric measurement equipments, a kind of hardware acceleration system is designed where MIMD distributed multi-processor architecture is used with SOPC technology. System hardware is composed of FPGA, SDRAM, SRAM, FLASH, and PCI bridge chip. Four Nios II embedded processors are integrated in a single FPGA chip, and communicate with each other by sharing memory. Experimental results indicate that the system meets the requirements of data-processing system in photoelectric measurement equipments and possesses practical significance for engineering applications.
Keywords :
SRAM chips; field programmable gate arrays; image processing; multiprocessing systems; parallel architectures; photoelectric devices; system-on-chip; FLASH; FPGA chip; MIMD distributed multiprocessor architecture; Nios II embedded processor; PCI bridge chip; SDRAM; SOPC technology; data-processing system; hardware acceleration system; image interpretation; photoelectric measurement equipment; system hardware; Artificial neural networks; Field programmable gate arrays; Hardware; Semiconductor device measurement; SOPC; data-processing; image interpretation; photoelectric measurement;
Conference_Titel :
Computer, Mechatronics, Control and Electronic Engineering (CMCE), 2010 International Conference on
Conference_Location :
Changchun
Print_ISBN :
978-1-4244-7957-3
DOI :
10.1109/CMCE.2010.5610019
