DocumentCode :
2684852
Title :
A Massively Parallel, Micro-grained VLSI Architecture
Author :
Bajwa, Raminder S. ; Owens, Robert Michael ; Irwin, Mary Jane
Author_Institution :
The Pennsylvania State University
fYear :
1993
fDate :
3-6 Jan 1993
Firstpage :
250
Lastpage :
255
Keywords :
Arithmetic; Computer architecture; Computer science; Hypercubes; Integrated circuit interconnections; Network topology; Plugs; Prototypes; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN :
1063-9667
Print_ISBN :
0-8186-3180-5
Type :
conf
DOI :
10.1109/ICVD.1993.669690
Filename :
669690
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2684852
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