A 3 V MMIC chip set for 1.9 GHz mobile communication systems

Author

Tanaka, S. ; Hase, E. ; Nakajima, A. ; Sugano, K. ; Fujioka, T. ; Imakado, Y. ; Fujiwara, K. ; Okamoto, T. ; Shigeno, Y. ; Sato, K. ; Arai, I. ; Yamane, M. ; Kusano, C. ; Sakamoto, K. ; Nakagawa, J. ; Koya, M.

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

fYear

1995

fDate

15-17 Feb. 1995

Firstpage

144

Lastpage

145

Abstract

A MMIC chip-set for 1.9 GHz mobile communication systems consists of a single-pole double-throw (SPDT) switch, a fully-integrated power amplifier, a low-noise amplifier integrated with an auto-gain-control (AGC) amplifier and an up-converter that is integrated on the same chip with a down-converter. All four chips operate at a 3/spl plusmn/0.2 V power supply and are fabricated using an ion-implanted GaAs MESFET process. This paper describes characteristics of the chip set and discusses the switch that employs a design technique for improved power performance.

Keywords

time division multiple access; 0.35 micron; 0.5 micron; 1.9 GHz; 3 V; AGC amplifier; GaAs; LNA; MMIC chip set; SPDT switch; TDMA; UHF mobile communication systems; downconverter; ion-implanted MESFET process; low-noise amplifier; power amplifier; single-pole double-throw switch; upconverter; Capacitors; Circuits; Communication switching; FETs; Frequency; Insertion loss; MMICs; Mobile communication; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1995. Digest of Technical Papers. 41st ISSCC, 1995 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-2495-1

Type

conf

DOI

10.1109/ISSCC.1995.535467

Filename

535467