A 2.7 V GSM transceiver ICs with on-chip filtering

A pair of low-power (2.7-6.6 V) ICs implements small GSM transceivers with a minimum of external components. Key aspects are the integration of the RF amplifiers, image rejection mixing, baseband channel selectivity filters and peripheral functions on-chip. 1.5 nF/mm/sup 2/ capacitors and both bipolar and CMOS devices are used in the 13 GHz f/sub T/ process to mix analog and digital functions. A single superhet architecture is used for both transmitter and receiver, one IC containing the RF and the other the IF circuitry. Both circuits and the common synthesizer and VCOs are time-multiplexed between transmit and receive. (GSM is a TDMA system.) An IF such as 400 MHz is envisaged for both transmit and receive to ease the filtering of spurious mixing products and allow applications in the 2 GHz band.