A new digital-to-analog conversion algorithm

Author

Watanabe, Kenzo ; Temes, Gabor C. ; Moriuchi, Yuzo

Author_Institution

Res. Inst. of Electron., Shizuoka Univ., Hamamatsu, Japan

fYear

1988

fDate

7-9 June 1988

Firstpage

2817

Abstract

An algorithm is described which starts digital-to-analog conversion with the most significant bit. This algorithm can be realized by using only sample/hold circuits, and thus permits high-speed conversion. Error analysis shows that a conversion accuracy of 10 bits or higher is easily obtainable with a monolithic implementation. The architecture of data converters using this algorithm and some experimental results are also given to confirm the principles of operation. it is concluded that the proposed algorithm is universal in that it is applicable to cyclic, successive-approximation, sequential-flash, pipeline, and flash conversion.<>

Keywords

digital-analogue conversion; sample and hold circuits; architecture; conversion accuracy; cyclic; data converters; digital-to-analog conversion algorithm; flash conversion; high-speed conversion; monolithic implementation; most significant bit; pipeline; sample/hold circuits; sequential-flash; successive-approximation; Counting circuits; Data conversion; Digital signal processing; Digital-analog conversion; Error analysis; Pipelines; Signal processing algorithms; Timing; Video signal processing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1988., IEEE International Symposium on

Conference_Location

Espoo, Finland

Type

conf

DOI

10.1109/ISCAS.1988.15524

Filename

15524