Title :
High speed multi-port static RAM silicon compiler
Author :
Hana, Haytharn H. ; Hussain, Syed J.
Abstract :
The authors describe the design methodology and features of a high-speed clocked static RAM compiler with a user-specified number of ports. The configurable floorplan and layout of the RAM module are also presented, as well as the design´s process independence. A five-port RAM, with three read and two write ports, is used as an example for performance and size results
Keywords :
application specific integrated circuits; circuit layout CAD; integrated memory circuits; random-access storage; ASIC; clocked multiport SRAM; configurable floorplan; design methodology; high speed memory; layout; silicon compiler; static RAM; user specified ports number;
Conference_Titel :
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/CICC.1989.56819
