DocumentCode :
2696281
Title :
Silicon interconnect-a critical factor in device thermal management
Author :
Witzman, S. ; Metelski, George ; Smith, Kelvin
Author_Institution :
BNR, Ottawa, Ont., Canada
fYear :
1990
fDate :
23-25 May 1990
Firstpage :
154
Lastpage :
160
Abstract :
Analytical and experimental methodologies for studying silicon device degradation under electrothermal stress are discussed. The experimental data support the assumption that the thermally induced stress due to power cycling and power surges is a major cause of device degradation. The analytical models point out the large impact that low-thermal-diffusivity layers (solder or epoxy) located near the heat source (the thermal junction) have on the acceleration of fatigue phenomena. Crack initiation and propagation in die attach layers due to stress/strain cycles is shown to be one of the leading factors in degradation of power cycled devices. It is concluded that correct design or selection of the silicon device interconnect can increase device reliability and allow the device to operate at temperatures up to 125°C, without increasing the field failure rate. The data in this study were accumulated during the investigation of failure mechanisms of solid-state protection devices. The nature of the observed degradation mechanism indicates that the conclusions can be extrapolated to the degradation mechanism of common logic devices (bipolar or MOS)
Keywords :
MOS integrated circuits; VLSI; bipolar integrated circuits; cooling; failure analysis; integrated circuit technology; microassembling; packaging; reliability; thermal resistance; thermal stress cracking; 12 C; MOS ICs; Si device degradation; Si interconnect; acceleration of fatigue phenomena; analytical models; bipolar ICs; cause of device degradation; crack initiation; crack propagation in die attach layers; critical factor; degradation mechanism; degradation of power cycled devices; device reliability; device thermal management; die bonding; electrothermal stress; epoxy; experimental data; experimental methodologies; failure mechanisms; field failure rate; high thermal resistance layers; junction temperature; logic devices; low-thermal-diffusivity layers; power cycling; power surges; solder; solid-state protection devices; stress/strain cycles; thermal junction; thermally induced stress; Acceleration; Analytical models; Electrothermal effects; Fatigue; Silicon devices; Surge protection; Thermal degradation; Thermal factors; Thermal management; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Thermal Phenomena in Electronic Systems, 1990. I-THERM II., InterSociety Conference on
Conference_Location :
Las Vegas, NV
Type :
conf
DOI :
10.1109/ITHERM.1990.113326
Filename :
113326
Link To Document :
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