Title :
Analysis of soft error rates in combinational and sequential logic and implications of hardening for advanced technologies
Author :
Mahatme, N.N. ; Chatterjee, I. ; Bhuva, B.L. ; Ahlbin, J. ; Massengill, L.W. ; Shuler, R.
Author_Institution :
Vanderbilt Univ., Nashville, TN, USA
Abstract :
Previous results and models have predicted that combinational logic errors would dominate over flip-flop errors for the past few technology nodes. However, recent experimental results show very little contribution from combinational-logic soft errors to overall soft-error rates. A model that explains the soft error rates as a function of frequency is developed to account for the inconsistency in observed data. Implications for hardening against soft errors for advanced technologies are discussed.
Keywords :
combinational circuits; error analysis; flip-flops; hardening; sequential circuits; combinational logic; flip-flop errors; hardening implications; sequential logic; soft error rate analysis; Error analysis; Flip-flops; Frequency; Integrated circuit technology; Logic gates; Predictive models; Single event upset; Space technology; Space vector pulse width modulation; Voltage; Soft error rates; single event effects; single event transient; single event upset; transient propagation; transient pulse-width;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-5430-3
DOI :
10.1109/IRPS.2010.5488680
