A test concept for circuit level aging demonstrated by a differential amplifier

In this work a general concept for accelerated aging of linear analog circuit blocks is proposed. Due to the interaction of diverse aging mechanisms, circuit behavior in an arbitrary effect accelerated stress setup may show large deviation to the aging under nominal circuit conditions. The proposed analytical small signal analysis proves to be a fast and easy way to obtain the contributions of all degrading transistors with respect to the output monitor of the circuit. Circuit aging simulations over temperature rise as well as supply and input voltage scaling show that single effect acceleration varies significantly between the involved mechanisms. This causes deviations in the aging output monitor compared to the aging under nominal circuit conditions. Based on these findings an accelerated circuit level aging test concept - applicable to linear circuits - is developed and evaluated for the example of a two-stage differential amplifier.