DocumentCode :
2700118
Title :
Silicon debug of a co-processor array for video applications
Author :
Vermeulen, Bart ; Van Rootselaar, Gert Jan
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fYear :
2000
fDate :
2000
Firstpage :
47
Lastpage :
52
Abstract :
For today´s multi-million transistor ICs, existing design verification techniques cannot guarantee that first silicon is designed error free. Because of this reality, there is a need for a good debug methodology. This paper describes the application of a generic silicon debug methodology to a modular video-processing chip called co-processor array (CPA). The debug hardware, which was added to the design, and the supporting debugger software are described. The application of the added debug functionality and its effectiveness during first silicon bring-up are also presented
Keywords :
computer debugging; coprocessors; coprocessor array; debug methodology; debugger software; design verification; generic silicon debug methodology; modular video-processing chip; silicon debug; video applications; Application software; Clocks; Coprocessors; Hardware; Phase locked loops; Prototypes; Silicon; Software debugging; Software prototyping; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Level Design Validation and Test Workshop, 2000. Proceedings. IEEE International
Conference_Location :
Berkeley, CA
Print_ISBN :
0-7695-0786-7
Type :
conf
DOI :
10.1109/HLDVT.2000.889558
Filename :
889558
Link To Document :
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