• DocumentCode
    2701481
  • Title

    Carbon based graphene nanoelectronics technologies

  • Author

    Sung, C.Y. ; Lin, Y.M. ; Hannon, J. ; Tromp, R. ; Chiu, H.Y. ; Valdes-Garcia, A. ; Jenkins, K. ; Xia, F. ; Farmer, D. ; Ott, J. ; Welser, J. ; Avouris, P.

  • Author_Institution
    T.J. Watson Res. Center, IBM, Yorktown Heights, NY, USA
  • fYear
    2010
  • fDate
    26-28 April 2010
  • Firstpage
    36
  • Lastpage
    37
  • Abstract
    Graphene, a two-dimensional carbon form with the highest intrinsic carrier mobility and many desirable physical properties at room temperature, is considered a promising material for ultra high speed and low power devices with the possibility of strong scaling potential due to the ultra-thin body. (Fig. 1) Here IBM reports progress in graphene nanoelectronics, synthesizing wafer-scale monolayer-controlled graphene and fabricating high-speed single atomic layer graphene FETs (GFET) with the highest value reported cut-off frequency (fT) 50 GHz, exceeding that of the same gate length Si FETs. It is achieved by improving gate oxide deposition and reducing series resistance. Systematic characterization and small-signal models enable further engineering and optimization for even higher performance. The high Ion/Ioff ratios from bi-layer graphene suggest potential not only for analog but also for logic applications.
  • Keywords
    carbon; carrier mobility; field effect transistors; graphene; low-power electronics; nanoelectronics; C; bilayer graphene; carbon based graphene nanoelectronics technology; cut-off frequency; frequency 50 Hz; gate oxide deposition; high-speed single atomic layer graphene FET; intrinsic carrier mobility; low power devices; room temperature; series resistance reduction; small-signal models; systematic characterization; temperature 293 K to 298 K; two-dimensional carbon; ultra high speed devices; ultra-thin body; wafer-scale monolayer-controlled graphene synthesis; Atomic layer deposition; Cutoff frequency; FETs; Gain measurement; Immune system; Logic; MOSFET circuits; Nanoelectronics; Semiconductor device modeling; Semiconductor process modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    978-1-4244-5063-3
  • Electronic_ISBN
    1524-766X
  • Type

    conf

  • DOI
    10.1109/VTSA.2010.5488960
  • Filename
    5488960