DocumentCode :
2706488
Title :
A 10 b 10 MHz triple-stage Bi-CMOS A/D converter
Author :
Matsuzawa, Akira ; Kagawa, Minoru ; Kanoh, Masaaki ; Tada, Shoichiro ; Nakashima, Shota ; Tatehara, Ken-ichi ; Shimizu, Kei-ichiro
fYear :
1990
fDate :
7-9 June 1990
Firstpage :
35
Lastpage :
36
Abstract :
The 10-b, 10 MHz BiCMOS A/D (analog-to-digital) converter with a triple-stage conversion scheme, combined with two novel conversion schemes, the dynamic sliding reference method and the triangular interpolation method, has been developed. This novel conversion scheme and BiCMOS circuit technology reduce element counts of bipolar transistors to only 2000. A small active area of 2.5×2.7 mm2 and a low power dissipation of 350 mW with an acceptable SNR (signal-to-noise ratio) of 54 dB including internal sample/hold and reference voltage circuit have been achieved
Keywords :
BIMOS integrated circuits; VLSI; analogue-digital conversion; integrated circuit technology; 10 MHz; 10 bit; 2.5 mm; 2.7 mm; 350 mW; 54 dB; ADC; BiCMOS circuit technology; SNR; active area; dynamic sliding reference method; internal sample/hold; power dissipation; reference voltage circuit; signal-to-noise ratio; triangular interpolation method; triple-stage conversion scheme;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1990. Digest of Technical Papers., 1990 Symposium on
Conference_Location :
Honolulu, Hawaii, USA
Type :
conf
DOI :
10.1109/VLSIC.1990.111082
Filename :
5727516
Link To Document :
بازگشت