• DocumentCode
    2707644
  • Title

    Test infrastructures evaluation at transaction level

  • Author

    Carlo, Stefano Di ; Hatami, Nadereh ; Prinetto, Paolo

  • Author_Institution
    Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
  • fYear
    2009
  • fDate
    1-6 Nov. 2009
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    The goal of this work is to propose a method to fully exploit TLM2.0 potentialities to evaluate test infrastructures. By providing the high level model with necessary information from RTL, the behavior of test infrastructures can be simulated taking advantage of high simulation speed of TLM. This way, the high level model is able to both estimate the cost of test infrastructure much faster and facilitate decision making for proper test infrastructure at RTL.
  • Keywords
    logic design; logic testing; RTL; TLM2.0; register transfer level system; test infrastructure evaluation; transaction level modeling; Automatic testing; Chip scale packaging; Cost function; Design optimization; Instruments; Life testing; Manufacturing; Production; Profitability; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2009. ITC 2009. International
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-4868-5
  • Electronic_ISBN
    978-1-4244-4867-8
  • Type

    conf

  • DOI
    10.1109/TEST.2009.5355830
  • Filename
    5355830