DocumentCode
2707808
Title
Optimizing the performance of ESD circuit protection devices
Author
Hyatt, H. ; Harris, J. ; Colby, J. ; Bellew, P.
Author_Institution
Littelfuse Inc., Des Plaines, IL, USA
fYear
2000
fDate
26-28 Sept. 2000
Firstpage
41
Lastpage
47
Abstract
Decision-making methods for choosing ESD circuit protection remain poorly understood. Selecting an IC which passed ESD device level testing does not guarantee that a particular circuit using that device will survive ESD events. We present an optimization methodology for assessment of ESD circuit protection.
Keywords
circuit optimisation; electrostatic discharge; integrated circuit measurement; integrated circuit reliability; integrated circuit testing; protection; ESD circuit protection; ESD circuit protection assessment; ESD circuit protection device performance optimization; ESD device level testing; ESD event survival; decision-making methods; optimization methodology; Cables; Circuit testing; Electromagnetic compatibility; Electrostatic discharge; Guidelines; Integrated circuit testing; Optimization methods; Protection; Routing; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000
Conference_Location
Anaheim, CA, USA
Print_ISBN
1-58537-018-5
Type
conf
DOI
10.1109/EOSESD.2000.890025
Filename
890025
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