• DocumentCode
    2709699
  • Title

    The use of TiSi2 local interconnect as an effective contact etch barrier

  • Author

    Seams, C. ; Stolmeijer, A. ; Parekh, N. ; Jonkers, A. ; Godon, H.

  • Author_Institution
    Philips Components, Eindhoven, Netherlands
  • fYear
    1990
  • fDate
    12-13 Jun 1990
  • Firstpage
    486
  • Lastpage
    488
  • Abstract
    TiSi2 local interconnect was used as an overetch barrier layer for shallow submicron contacts in a fully planarized submicron salicide CMOS process used for manufacturing 1-Mb SRAMs. By placing a pad of local interconnect under all contacts to polysilicon, the complete removal of the silicide is prevented. The result is a stable, low contact resistance to polysilicon
  • Keywords
    CMOS integrated circuits; SRAM chips; VLSI; integrated circuit technology; metallisation; ohmic contacts; sputter etching; titanium compounds; 1 Mbit; 1-Mb SRAMs; TiSi2 local interconnect; TiSi2-Si contact; contact etch barrier; fully planarized submicron salicide CMOS process; low contact resistance to polysilicon; overetch barrier layer; polycrystalline Si; shallow submicron contacts; stable contacts; Amorphous silicon; CMOS technology; Contact resistance; Degradation; Etching; Manufacturing processes; Random access memory; Resists; Silicides; Titanium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Multilevel Interconnection Conference, 1990. Proceedings., Seventh International IEEE
  • Conference_Location
    Santa Clara, CA
  • Type

    conf

  • DOI
    10.1109/VMIC.1990.127937
  • Filename
    127937
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2709699