• DocumentCode
    271124
  • Title

    Exploring pel decimation to trade off between energy and quality in video coding

  • Author

    Seidel, Ismael ; Beims Bräscher, André ; Monteiro, Márcio ; Güntzel, José Luís

  • Author_Institution
    Dept. of Inf. & Stat., Fed. Univ. of Santa Catarina, Florianópolis, Brazil
  • fYear
    2014
  • fDate
    25-28 Feb. 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This work investigates the trade-offs between energy and quality in video coding when pel decimation is applied. Realistic estimates for area and energy per block were obtained by simulating five different architectures specially designed to compute the Sum of Absolute Differences (SAD) for 4×4 pixel blocks. Among these architectures, one can be configured to operate with 1:1, 4:3, 2:1 or 4:1 sample ratios, whereas the rest are tailored to operate exclusively with each one of those ratios. The five VLSI architectures were logically synthesized for a 45 nm industrial standard cell library for a target frequency and also for the maximum achievable frequency. They were also simulated with 100 k input vectors obtained by using an H.264/AVC encoder running on one full HD (1080p) video sample. The obtained results show that by using the configurable architecture with full sampling, the best energy/block result was 3.54 pJ/block (60% better than the non-configurable with 7.08 pJ/block). The energy/block value can be further reduced until 1.34 pJ/block at the cost of 2.8% in PSNR, on average, and 14.1% in SSIM, on average.
  • Keywords
    VLSI; integrated circuit design; video coding; H.264/AVC encoder; SAD; VLSI architectures; energy-block value; full HD video sample; industrial standard cell library; pel decimation; size 45 nm; sum of absolute differences; target frequency; video coding; Computer architecture; Encoding; Frequency synthesizers; Standards; Vectors; Very large scale integration; Video coding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (LASCAS), 2014 IEEE 5th Latin American Symposium on
  • Conference_Location
    Santiago
  • Print_ISBN
    978-1-4799-2506-3
  • Type

    conf

  • DOI
    10.1109/LASCAS.2014.6820316
  • Filename
    6820316