An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing

Author

Jendernalik, W. ; Blakiewicz, G. ; Jakusz, J. ; Szczepanski, S. ; Piotrowski, R.

Author_Institution

Fac. of Electron., Telecommun. & Inf., Gdansk Univ. of Technol., Gdansk, Poland

Volume

60

Issue

2

fYear

2013

fDate

Feb. 2013

Firstpage

279

Lastpage

289

Abstract

A new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3 × 3 kernel. The proof-of-concept circuit is implemented in 0.35 μm CMOS technology, and contains a 64 × 64 SIMD matrix with embedded APEs. The matrix dissipates less than 0.3 mW (less than 0.1 W per APE) of power under 3.3 V supply, and its image processing speed is up to 100 frames/s.

Keywords

CMOS analogue integrated circuits; CMOS image sensors; capacitors; convolution; field effect transistor switches; image processing; integrated circuit design; low-power electronics; matrix algebra; parallel processing; photodiodes; APE; MOS switches; SIMD matrix; analog processing element; analog submiliwatt CMOS image sensor; capacitors; convolution algorithm; image processing speed; low-level image processing algorithms; photodiode; pixel-level convolution processing; proof-of-concept circuit; ultra-low power medium-resolution vision chip design; Capacitance; Capacitors; Convolution; Power demand; Switches; Transistors; Analog processor array; CMOS vision sensor; low power image processing; vision chip;

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2012.2215803

Filename

6419862