DocumentCode :
2715634
Title :
A refinement process for top-down mixed-signal designs thanks to SystemC-AMS
Author :
Paugnat, Franck ; Morin-Allory, Katell ; Fesquet, Laurent
Author_Institution :
TIMA Lab. Grenoble, Grenoble, France
fYear :
2011
fDate :
26-29 June 2011
Firstpage :
378
Lastpage :
381
Abstract :
Since the emergence of Systems on Chip (SoC), designing is more challenging, especially when the system integrates analog and digital parts. Codesigning is now a necessity to simulate and validate successfully a complex SoC. This paper describes a refinement process for top-down analog and mixed-signal designs. The most abstracted levels are required to have a coherent codesign at the system level, but they are still missing in the current analog design-flows. The refinement steps from the high level down to the hardware implementation levels are described in the SystemC framework and illustrated by an example that exploits the cosimulation capabilities of SystemC-AMS.
Keywords :
mixed analogue-digital integrated circuits; system-on-chip; SoC; SystemC-AMS; current analog design-flows; hardware implementation levels; refinement process; systems on chip; top-down analog; top-down mixed-signal designs; Clocks; Frequency control; Frequency conversion; Generators; Process control; Time frequency analysis; Voltage control; SystemC AMS; abstraction level; analog design; high-level synthesis; mixed signal; refinement; top-down;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International
Conference_Location :
Bordeaux
Print_ISBN :
978-1-61284-135-9
Type :
conf
DOI :
10.1109/NEWCAS.2011.5981249
Filename :
5981249
Link To Document :
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