DocumentCode :
2715852
Title :
Optimizing data scheduling on processor-in-memory arrays
Author :
Tian, Yi ; Sha, Edwin H M ; Chantrapornchai, Chantana ; Kogge, Peter M.
Author_Institution :
Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA
fYear :
1998
fDate :
30 Mar-3 Apr 1998
Firstpage :
57
Lastpage :
61
Abstract :
In the study of PetaFlop project, Processor-in-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. However one of the major obstacles to achieve the fast computing was interprocessor communications, which lengthen the total execution time of an application. A good data scheduling, consisting of finding initial data placement and data movement during the run-time, can give a significant reduction in the total communication cost and the execution time of the application. In this paper, we propose efficient algorithms for the data scheduling problem. Experimental results show the effectiveness of the proposed approaches. Compared with default data distribution methods such as row-wise or column-wise distributions, the average improvement for the tested benchmarks can be up to 30%
Keywords :
parallel architectures; performance evaluation; processor scheduling; PetaFlop project; data movement; data placement; data scheduling optimisation; default data distribution methods; interprocessor communications; processor-in-memory arrays; Benchmark testing; Computer architecture; Computer science; Costs; Electrical capacitance tomography; Logic; Parallel architectures; Processor scheduling; Runtime; Terminology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing Symposium, 1998. IPPS/SPDP 1998. Proceedings of the First Merged International ... and Symposium on Parallel and Distributed Processing 1998
Conference_Location :
Orlando, FL
ISSN :
1063-7133
Print_ISBN :
0-8186-8404-6
Type :
conf
DOI :
10.1109/IPPS.1998.669890
Filename :
669890
Link To Document :
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