A small-size adder-free π/4-shift QPSK signal generator

We propose a novel adder-free architecture for realizing a small-size π/4-shift QPSK signal generator IC. In order to realize an adder function, analog current-mode addition is utilized instead of digital adders. The impulse response of a roll-off filter is stored in a ROM as a Δ-Σ modulated one-bit data stream. This can greatly reduce the die size to 0.8 mm×0.8 mm with maintaining high modulation accuracy. The test chip was fabricated by using the standard 0.8 μm CMOS technology, and the chip achieved 1.8% modulation error with a 2.7 V power supply