MiniRISC CW4001-a small, low-power MIPS CPU core

The MiniRISC CW4001 is a small, low-power RISC CPU core that implements the MTPS-2 ISA. The CW4001 CPU Core is 3.5 mm² in area (two-layer metal) and is implemented in LSI Logic´s LCB500K 0.5-micron drawn cell-based ASIC technology. Operating frequency when used in an ASIC is up to 60 MHz under worst case conditions (slow process, 3.15 V, 70 C). Power is estimated to be 2 mW/MHz. Peak performance when running out of on-chip cache is 48 MIPS (assuming 25% loads/stores). Target applications are cost and/or power-constrained applications, such as portable telecommunications, handheld computing, and consumer multimedia. In addition to the CW4001 CPU core, several key bolt-ons are designed, including an MMU, a Basic Bus Interface/Cache Controller (BBCC), a Fast Multiply/Divide Unit (MDU), and Timers. The CW4001 CPU Core and selected bolt-ons have been implemented in silicon in the MR4001 Lead Vehicle