DocumentCode
272234
Title
Dark silicon as a challenge for hardware/software co-design
Author
Shafique, Muhammad ; Garg, Shelly ; Mitra, Tulika ; Parameswaran, Sri ; Henkel, Jörg
Author_Institution
Dept. of Embedded Syst., Karlsruhe Inst. of Technol., Karlsruhe, Germany
fYear
2014
fDate
12-17 Oct. 2014
Firstpage
1
Lastpage
10
Abstract
Dark Silicon refers to the observation that in future technology nodes, it may only be possible to power-on a fraction of on-chip resources (processing cores, hardware accelerators, cache blocks and so on) in order to stay within the power budget and safe thermal limits, while the other resources will have to be kept powered-off or “dark”. In other words, chips will have an abundance of transistors, i.e., more than the number that can be simultaneously powered-on. Heterogeneous computing has been proposed as one way to effectively leverage this abundance of transistors in order to increase performance, energy efficiency and even reliability within power and thermal constraints. However, several critical challenges remain to be addressed including design, automated synthesis, design space exploration and run-time management of heterogeneous dark silicon processors. The hardware/software co-design and synthesis community has potentially much to contribute in solving these new challenges introduced by dark silicon and, in particular, heterogeneous computing. In this paper, we identify and highlight some of these critical challenges, and outline some of our early research efforts in addressing them.
Keywords
hardware-software codesign; power aware computing; automated synthesis; design space exploration; energy efficiency improvement; hardware-software co-design; heterogeneous computing; heterogeneous dark silicon processors; on-chip resources; performance improvement; power budget; power constraint; reliability improvement; run-time management; safe thermal limits; thermal constraint; transistors; Computer architecture; Hardware; Program processors; Reliability; Silicon; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2014 International Conference on
Conference_Location
New Delhi
Type
conf
DOI
10.1145/2656075.2661645
Filename
6971829
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