Multiplexing test system channels for data rates above 1 Gb/s

The author describes high-speed digital circuits appropriate for use in testing devices at data rates above 1 Gb/s. A system which combines several test channels to form a smaller number of higher frequency data sources is described. Each combination of channels provides software-programmable data streams which are used as input stimuli to the device under test (DUT). The responses of DUT outputs are tested at high frequency through multipass monitoring of DUT outputs with existing comparators. Initial experiments have demonstrated the feasibility of this approach at rates above 1 Gb/s using digital GaAs logic. Burst rates above 2 Gb/s have also been achieved. The methods described are widely applicable to a variety of high-speed component technologies, including submicrometer CMOS, emitter-coupled logic, and GaAs