DocumentCode
2724099
Title
Temporary wafer bonding defect impact assessment on substrate thinning: Process enhancement through systematic defect track down
Author
Phommahaxay, Alain ; Verbinnen, Greet ; Suhard, Samuel ; Bex, Pieter ; Pancken, Joris ; Lismont, Mark ; Van den Eede, Axel ; Jourdain, Anne ; Woitke, Tobias ; Bisson, Peter ; Spiess, Walter ; Swinnen, Bart ; Beyer, Gerald ; Miller, Andy ; Beyne, Eric
Author_Institution
IMEC, Leuven, Belgium
fYear
2012
fDate
May 29 2012-June 1 2012
Firstpage
1255
Lastpage
1259
Abstract
Among the technological developments pushed by the emergence of 3D-ICs, wafer thinning has become a key element in device processing over the past years. As volume increases, defects in the overall thinning process flow will become a major element of focus in the future. Indeed product wafers arriving at this point of process are of maximum value. Fundamental understanding of the potential defects and their impact on devices is therefore needed to minimize their recurrence.
Keywords
adhesive bonding; integrated circuit bonding; three-dimensional integrated circuits; wafer bonding; 3D-IC; adhesive application; product wafers; substrate thinning; systematic defect track down; temporary wafer bonding defect impact assessment; thinning process flow; wafer thinning; Bonding; Coatings; Inspection; Optical films; Silicon; Solvents; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
978-1-4673-1966-9
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2012.6248996
Filename
6248996
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