Title :
Ultra low-cost through-silicon holes (TSHs) interposers for 3D IC integration SiPs
Author :
Wu, Sheng-Tsai ; Lau, John H. ; Chien, Heng-Chieh ; Hung, Jui-Feng ; Dai, Ming-Ji ; Chao, Yu-Lin ; Tain, Ra-Min ; Lo, Wei-Chung ; Kao, Ming-Jer
Author_Institution :
Electron. & Optoelectron. Res. Lab., Ind. Technol. Res. Inst. (ITRI), Hsinchu, Taiwan
fDate :
May 29 2012-June 1 2012
Abstract :
In this study, a very low-cost silicon interposer with many through-silicon holes (TSHs) for 3D IC integration system-in-package (SiP) applications is proposed. Unlike TSVs (through-silicon vias), the uniqueness of this design is there is not the dielectric layer, barrier layer, seed layer, filled Cu, and thus CMP and TSV Cu reveal are not necessary for the TSHs. The vertical interconnects between (face-to-face) the top chips and bottom chips of the TSH interposer are through Cu wires or columns. The electrical, thermal and mechanical behaviors of this new design are demonstrated by nonlinear finite element simulations.
Keywords :
finite element analysis; system-in-package; three-dimensional integrated circuits; 3D IC integration SiP; CMP; TSH interposers; TSV; electrical behaviors; mechanical behaviors; nonlinear finite element simulations; thermal behaviors; through-silicon via; ultra low-cost through-silicon hole interposers; vertical interconnection; Creep; Silicon; Soldering; Stress; Substrates; Through-silicon vias;
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4673-1966-9
Electronic_ISBN :
0569-5503
DOI :
10.1109/ECTC.2012.6249053
