Title :
Impact of Ionic Implantation Energy in Latchup by using Retrograde Wells in a Submicron Depth Bulk CMOS Process
Author :
Mixcoatl, Felipe Coyotl ; Jacome, Alfonso Torres
Author_Institution :
Dept. of Electron., Instituto Nacional de Astrofisica, Optica y Electronica, Puebla
Abstract :
Latchup is a parasitic and intrinsic effect on CMOS technology. When a CMOS circuits is triggered in latchup a circuit malfunctioning or circuit destroying can occur. In this work, results of simulation for obtaining and reducing latchup critical values by using majority guard ring structures, retrograde wells and separation between parasitic emitters are presented. Then these results are compared with reported data in experimental works
Keywords :
CMOS integrated circuits; integrated circuit reliability; ion implantation; circuit malfunction; guard ring structures; intrinsic effect; ionic implantation energy; latchup reduction; parasitic effect; parasitic emitters; retrograde wells; submicron depth bulk CMOS process; CMOS process; CMOS technology; Circuits and systems; Impedance; MOSFETs; Optical devices; P-n junctions; Testing; Thyristors; Voltage;
Conference_Titel :
Devices, Circuits and Systems, Proceedings of the 6th International Caribbean Conference on
Conference_Location :
Playa del Carmen
Print_ISBN :
1-4244-0041-4
Electronic_ISBN :
1-4244-0042-2
DOI :
10.1109/ICCDCS.2006.250887
