DocumentCode :
2728941
Title :
High-speed parallel interface implementation with low-cost system solution by using signal integrity factorial design
Author :
Hsu, Jimmy ; Yang, Sam ; Guo, Wei-Da ; Lee, Renee ; Chen, Tung-Yang
Author_Institution :
Himax Technol., Inc., Taipei, Taiwan
fYear :
2010
fDate :
1-4 June 2010
Firstpage :
1900
Lastpage :
1905
Abstract :
A systematic design method by using channel factorial design is proposed to meet the low-cost DDRII system solution with quad-flat-package (QFP) and two-layer printed circuit board. The channel characteristic was analyzed through one numerical transformation between time and frequency domains to figure out the time-variant waveform on the corresponding spectrum for potential radiated emission issues. By using the factorial analysis, the critical electrical parameters could be clearly list down and optimized in the pre-design analysis. This methodology could be usefully applied in the electrical physical constraint setup and budget control on the design phase. We can make a right compromise among the different design electrical factors with the corresponding penalties to robustly function up to DDRII 800Mbps in this low-cost system.
Keywords :
Application software; Couplings; Electronics packaging; Frequency domain analysis; Impedance; Power distribution; Random access memory; Signal design; Surges; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2010 Proceedings 60th
Conference_Location :
Las Vegas, NV, USA
ISSN :
0569-5503
Print_ISBN :
978-1-4244-6410-4
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2010.5490696
Filename :
5490696
Link To Document :
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