DocumentCode
2729935
Title
Performance constraints generation for analog circuit layout
Author
Mahmoud, Imbaby I.
Author_Institution
Dept of Eng., Atomic Energy Authority, Egypt
fYear
1998
fDate
24-26 Feb 1998
Abstract
In this paper, a method for layout constraint generation of analog circuits is presented. The method comprises two phases: primitive recognition and constraint generation. A mixed analytical/knowledge-based technique is proposed. Complexity analysis shows the effectiveness of this method compared with simulation based methods
Keywords
analogue integrated circuits; circuit complexity; circuit layout CAD; constraint theory; integrated circuit layout; knowledge based systems; operational amplifiers; IC layout; analog circuit layout; complexity analysis; mixed analytical/knowledge-based technique; performance constraints generation; primitive recognition; Algorithm design and analysis; Analog circuits; Analytical models; Circuit simulation; Circuit topology; Degradation; Integrated circuit interconnections; Performance analysis; Routing; Sensitivity analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Science Conference, 1998. NRSC '98. Proceedings of the Fifteenth National
Conference_Location
Cairo
Print_ISBN
0-7803-5121-5
Type
conf
DOI
10.1109/NRSC.1998.711497
Filename
711497
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