DocumentCode :
2730158
Title :
Analysis of Failure Mechanism on Gate-Silicided and Gate-Non-Silicided, Drain/Source Silicide-blocked ESD NMOSFETs in a 65nm Bulk CMOS Technology
Author :
Li, Junjun ; Alvarez, David ; Chatty, Kiran ; Abou-Khalil, Michel J. ; Gauthier, Robert ; Russ, Christian ; Seguin, Christopher ; Halbach, Ralph
Author_Institution :
IBM Semicond. Res. & Dev. Center, Essex Junction, VT
fYear :
2006
fDate :
3-7 July 2006
Firstpage :
276
Lastpage :
280
Abstract :
Electrical and SEM analysis of gate-silicided (GS) and gate-non-silicided (GNS) ESD NMOSFETs in a 65nm bulk CMOS technology show that the failure mechanism switches away from classical drain-to-source filamentation when the silicidation between the silicide-blocked drain/source and the polysilicon gate is avoided. For 2.5V thick oxide devices, drain-to-substrate junction shorting was observed, whereas, for 1.0V thin oxide devices, gate-oxide breakdown failure occurred
Keywords :
MOSFET; electrostatic discharge; failure analysis; semiconductor device breakdown; semiconductor device reliability; 1.0 V; 2.5 V; 65 nm; bulk CMOS technology; drain-source silicide-blocked ESD NMOSFET; drain-to-substrate junction shorting; failure mechanism analysis; gate-non-silicided NMOSFET; gate-oxide breakdown failure; gate-silicided NMOSFET; Analytical models; CMOS technology; Electric variables measurement; Electrostatic discharge; Failure analysis; Leakage current; MOSFETs; Research and development; Silicides; Space vector pulse width modulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2006. 13th International Symposium on the
Conference_Location :
Singapore
Print_ISBN :
1-4244-0205-0
Electronic_ISBN :
1-4244-0206-9
Type :
conf
DOI :
10.1109/IPFA.2006.251045
Filename :
4017070
Link To Document :
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