DocumentCode :
2738153
Title :
Measurement of Charge Evolution in Oxides of DC Stressed MOS Structures
Author :
Boyer, Ludovic ; Notingher, Petru, Jr. ; Agnel, Serge ; Rousset, Bernard ; Sanchez, Jean-Louis
Author_Institution :
Inst. d´´Electron. du Sud, Univ. Montpellier 2, Montpellier, France
fYear :
2010
fDate :
3-7 Oct. 2010
Firstpage :
1
Lastpage :
8
Abstract :
This work addresses electric charge measurement in gate oxides of metal-oxide-semiconductor (MOS) structures submitted to dc stress similar to that applied in power electronics components during service (2 MV/cm to 4 MV/cm). The qualitative and quantitative variation of the charge is analyzed via capacitance-voltage and thermal-step measurements, taking into account the structure geometry and the different phenomena occurring during stress. It is shown that, while the capacitance-voltage technique, which is mainly sensitive to the charges placed near the substrate, the thermal-step method is more sensitive for detecting the charges placed all over the oxide. It is shown that the association of the two complimentary techniques can allow to identify and to localize the charges across the quasi-totality of the gate oxide.
Keywords :
MIS structures; power electronics; space charge; thermal stability; capacitance-voltage measurement; charge evolution; dc stressed MOS structures; electric charge measurement; gate oxides; metal-oxide-semiconductor structure; power electronics component; thermal-step measurement; Current measurement; Logic gates; Silicon; Stress; Stress measurement; Temperature measurement; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industry Applications Society Annual Meeting (IAS), 2010 IEEE
Conference_Location :
Houston, TX
ISSN :
0197-2618
Print_ISBN :
978-1-4244-6393-0
Type :
conf
DOI :
10.1109/IAS.2010.5614500
Filename :
5614500
Link To Document :
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