DocumentCode
274337
Title
SYLON-DREAM: a multi-level network synthesizer
Author
Chen, K.-C. ; Muroga, S.
Author_Institution
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
fYear
1989
fDate
5-9 Nov. 1989
Firstpage
552
Lastpage
555
Abstract
SYLON-DREAM, a logic network synthesizer which consists of SYLON-DREAM-INI for designing initial networks and SYLON-DREAM-MIN for further optimization, is presented. Unlike the networks designed by other approaches, those designed by SYLON-DREAM consist of MOS cells satisfying given constraints on the maximum number of series and parallel transistors. Such networks can be easily realized by a cell generator or mapped to the gates in existing cell libraries.<>
Keywords
MOS integrated circuits; logic CAD; many-valued logics; minimisation of switching nets; MOS cells; cell generator; logic CAD; logic network synthesizer; multi-level network synthesizer; Algorithm design and analysis; Application specific integrated circuits; Automatic logic units; Computer science; Design optimization; Humans; Libraries; Logic design; MOSFETs; Synthesizers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-1986-4
Type
conf
DOI
10.1109/ICCAD.1989.77011
Filename
77011
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