Design of a Double-Balanced Mixer using a 0.5-μm CMOS Technology

Author

Regalado, G. ; Sandoval-Ibarra, F.

Author_Institution

CINVESTAV, Unidad Guadalajara, Zapopan

fYear

2006

fDate

6-8 Sept. 2006

Firstpage

1

Lastpage

4

Abstract

This paper describes the design of a CMOS double-balanced mixer for UHF applications. The mixer has been designed according technological design rules of a 0.5 mum, N-well CMOS process. Since this design uses 4-transistors per current-branch, operating under the strong inversion regimen, the minimum power supply required for correct operation is 4.8 V. In practice, the mixer´s power supply will be taken from the RF energy with help of a voltage multiplier. From simulation results a power consumption of 16 mW was deduced. The mixer occupies an area of 92.4times91.5 mum²

Keywords

CMOS integrated circuits; UHF mixers; UHF transistors; integrated circuit design; voltage multipliers; 0.5 micron; 16 mW; 4.8 V; N-well CMOS process; RF energy; UHF application; double-balanced mixer design; power consumption; power supply; transistors; voltage multiplier; CMOS technology; Circuit testing; Energy consumption; Integrated circuit modeling; Local oscillators; Mixers; Power supplies; Radio frequency; Transceivers; Voltage; Local oscillator; active mixer; transceiver;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Electronics Engineering, 2006 3rd International Conference on

Conference_Location

Veracruz

Print_ISBN

1-4244-0402-9

Electronic_ISBN

1-4244-0403-7

Type

conf

DOI

10.1109/ICEEE.2006.251890

Filename

4017975