BIST-based diagnostics of FPGA logic blocks

Author

Stroud, Charles ; Lee, Eric ; Abramovici, Miron

Author_Institution

Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA

fYear

1997

fDate

1-6 Nov 1997

Firstpage

539

Lastpage

547

Abstract

Accurate diagnosis is an essential requirement in many testing environments, since it is the basis for any repair or replacement strategy used for chip or system fault-tolerance. In this paper we present the first approach able to diagnose faulty programmable logic blocks (PLBs) in Field Programmable Gate Arrays (FPGAs) with maximal diagnostic resolution. Our approach is based on a new Built-In Self-Test (BIST) architecture for FPGAs and can accurately locate any single and most multiple faulty PLBs. An adaptive diagnostic strategy provides identification of faulty PLBs with a 7% increase in testing time over the complete detection test, and can also be used for manufacturing yield enhancement. We present results showing identification of faulty PLBs in defective ORCA chips

Keywords

built-in self test; fault diagnosis; field programmable gate arrays; integrated circuit testing; integrated circuit yield; logic testing; BIST architecture; BIST-based diagnostics; FPGA logic blocks; ORCA chips; adaptive diagnostic strategy; detection test; diagnostic resolution; faulty programmable logic blocks; manufacturing yield enhancement; multiple faulty PLBs; replacement strategy; single faulty PLBs; system fault-tolerance; testing environments; testing time; Built-in self-test; Circuit faults; Circuit testing; Fault diagnosis; Field programmable gate arrays; Logic devices; Logic testing; Manufacturing; Programmable logic arrays; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1997. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-4209-7

Type

conf

DOI

10.1109/TEST.1997.639662

Filename

639662