Title :
A new configuration of differential CMOS LNA
Author :
Xuan, Chen ; Quanyuan, Feng
Author_Institution :
Inst. of Microelectron., Southwest Jiaotong Univ., Chengdu
Abstract :
This paper proposed a 2.5 GHz differential CMOS LNA which fabricated with the 0.18 mum CMOS process. This design used two-input and two-output architecture. Complying with the aspects of noise optimization, linear gain, impedance matching, the linearity and the design methodology of LNA are analyzed in detail, and the source inductive Ls, input matching capacitance and gate width W1. W2 is also discussed. By using the ADS software we make the simulation and get that the LNA consumes 5.4 mA current at 2 V supply voltage, and exhibits a linear gain of 15.053 dB, noise figure of 1.910 dB, S11 of -50.687 dB, S12 of -18.132 dB and the 1 dB gain compression point of 4.013 dBm.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; analogue integrated circuits; integrated circuit manufacture; low noise amplifiers; ADS software; current 5.4 mA; differential CMOS LNA; frequency 2.5 GHz; gain 15.053 dB; impedance matching; low noise amplifiers; noise figure 1.910 dB; noise optimization; size 0.18 mum; voltage 2 V; CMOS process; Capacitance; Computer architecture; Design methodology; Design optimization; Gain; Impedance matching; Linearity; Process design; Voltage;
Conference_Titel :
Industrial Informatics, 2008. INDIN 2008. 6th IEEE International Conference on
Conference_Location :
Daejeon
Print_ISBN :
978-1-4244-2170-1
Electronic_ISBN :
1935-4576
DOI :
10.1109/INDIN.2008.4618179
