Title :
Automating the sizing of analog CMOS circuits by consideration of structural constraints
Author :
Schwencker, R. ; Eckmueller, J. ; Graeb, H. ; Antreich, K.
Author_Institution :
Inst. of Electron. Design Autom., Tech. Univ. of Munich, Germany
Abstract :
In this paper a method for the automatic sizing of analog integrated circuits is presented. Basic sizing rules, representing circuit knowledge, are set up before the sizing and are introduced as structural constraints into the sizing process. Systematic consideration of these structural constraints during the automatic sizing prevents pathologically sized circuits and speeds up the automatic sizing. The sizing is done with a sensitivity-based, iterative trust region method.
Keywords :
CMOS analogue integrated circuits; circuit CAD; integrated circuit design; iterative methods; minimisation; operational amplifiers; analog CMOS circuits; automatic sizing; iterative trust region method; sensitivity-based method; structural constraints; Analog circuits; CMOS analog integrated circuits; Circuit simulation; Computational modeling; Design automation; Electronic design automation and methodology; Iterative algorithms; Mirrors; Numerical simulation; Signal design;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings
Conference_Location :
Munich, Germany
Print_ISBN :
0-7695-0078-1
DOI :
10.1109/DATE.1999.761141
