FPGA based UWB MISO time-reversal system design and implementation

In this paper, a testbed design and implementation of ultra-wideband (UWB) multiple-input single-output (MISO) time-reversal system are presented. The implementation is based on field programmable gate array (FPGA). The combination of MISO with UWB time-reversal is promising for enhancing the data rate and reliability in harsh wireless environments. When multiple transmitter antennas are considered with UWB time-reversal, the coherency between multiple antennas becomes critical. With a practical system, the coherency is impaired due to imperfect hardware. An effective baseband compensation technique is proposed and tested. Moreover, detailed implementation issues and experimental results based on a UWB 2×1 MISO time-reversal testbed are reported.