Title :
Distributed, dynamic, and efficient testing of large scale multiple processor systems
Author :
Hosseini, S.H. ; Jamal, N.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Wisconsin-Milwaukee Univ., WI, USA
Abstract :
The authors propose a distributed test algorithm for multiple processor systems where a central fault-free entity such as a host computer does not exist for any purpose such as control, fault-diagnosis, and system reconfiguration. The proposed algorithm is dynamic, i.e. testing assignments are not fixed ahead of time but rather are made as processors or interprocessor links fail. This dynamic property of the algorithm improves system performance by reducing the number of testers assigned to every processor while allowing the existence of multiple faulty processors and interprocessor communication links at every round of testing. Simulation results verify the effectiveness of the given approach
Keywords :
computer testing; distributed processing; fault tolerant computing; multiprocessing systems; multiprocessor interconnection networks; distributed test algorithm; faulty interconnection links; host computer; interprocessor links; multiple faulty processors; multiple processor systems; testing assignments; Centralized control; Control systems; Distributed computing; Fault diagnosis; Heuristic algorithms; Large-scale systems; Performance evaluation; System performance; System testing; Tree graphs;
Conference_Titel :
Parallel and Distributed Processing, 1990. Proceedings of the Second IEEE Symposium on
Conference_Location :
Dallas, TX
Print_ISBN :
0-8186-2087-0
DOI :
10.1109/SPDP.1990.143535