DocumentCode :
2761642
Title :
CPLD-Based Implementation of Computer Bus RAM
Author :
Jun, Yang ; Jun, Ding ; Na, Li ; Yixiong, Guo
Author_Institution :
Sch. of Inf. Sci. & Eng., Yunnan Univ., Kunming, China
Volume :
2
fYear :
2010
fDate :
6-7 March 2010
Firstpage :
71
Lastpage :
74
Abstract :
Along with the rapid application of large-scale integrated circuit and computer system is growing by geometric series, the boundary between hardware and software has blurred. EDA, a novel technology arisen in recent years has been challenged with the traditional hardware design, because the original method and mode cannot satisfy modern hardware system design. In this paper, we implement the complex design in a new way, where the programmable logic undoubtedly becomes the best suited technology.
Keywords :
Application software; Application specific integrated circuits; Data buses; Electronic design automation and methodology; Hardware; Integrated circuit technology; Large scale integration; Logic design; Programmable logic arrays; Read-write memory; Bus; CPLD; EDA; Programmable Logic; RAM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Challenges in Environmental Science and Computer Engineering (CESCE), 2010 International Conference on
Conference_Location :
Wuhan, China
Print_ISBN :
978-0-7695-3972-0
Electronic_ISBN :
978-1-4244-5924-7
Type :
conf
DOI :
10.1109/CESCE.2010.126
Filename :
5493228
Link To Document :
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