On using IEEE P1500 SECT for test plug-n-play

Author

Marinissen, Erik Jan ; Kapur, Rohit ; Zorian, Yervant

Author_Institution

Dept. of Digital Design & Test, Philips Res. Lab., Eindhoven, Netherlands

fYear

2000

fDate

2000

Firstpage

770

Lastpage

777

Abstract

System chips are increasingly designed by embedding reusable cores. A core-based test strategy for such ICs is often attractive and sometimes even mandatory. IEEE P1500 SECT is a standard under development that standardizes a core test language and a core wrapper, in order to facilitate plug-n-play core testing. In this paper, we describe how one standard supports both easy integration and interoperability as well as flexibility and scalability. Possible usage scenarios of the standard for core providers, core users, and EDA tool developers are sketched

Keywords

IEEE standards; automatic test pattern generation; automatic test software; design for testability; embedded systems; integrated circuit testing; logic testing; open systems; DFT; EDA tool developers; IEEE P1500 SECT; SoC; core test language; core wrapper; core-based test strategy; dual compliance levels; easy integration; embedding reusable cores; flexibility; interoperability; plug-n-play core testing; scalability; Circuit testing; Electronic design automation and methodology; Floors; Integrated circuit manufacture; Integrated circuit technology; Laboratories; Scalability; Standards development; System testing; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2000. Proceedings. International

Conference_Location

Atlantic City, NJ

ISSN

1089-3539

Print_ISBN

0-7803-6546-1

Type

conf

DOI

10.1109/TEST.2000.894273

Filename

894273