Low power n-bit adders and multiplier using lowest-number-of-transistor 1-bit adders

Author

Vasefi, Fartash ; Abid, Z.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Western Ontario, London, Ont.

fYear

2005

fDate

1-4 May 2005

Firstpage

1731

Lastpage

1734

Abstract

4-bit ripple carry adders (RCA), 12-bit carry select adders (CSA), and a 4times4 Braun multiplier, based on lowest-number-of-transistor full adders, were designed and simulated. The designed full adders consist of 10 transistors and were used for n-bit adders with output voltage levels having a maximum of one threshold voltage (Vr) degradation. The 10 transistors adder achieved a 43.68% reduction in the power dissipation compared to the standard CMOS-28T adder. Power consumption can be further reduced by using an extra stack transistor. A 12-transistor adder was also designed for low area array multipliers

Keywords

adders; carry logic; multiplying circuits; network synthesis; power consumption; transistor circuits; 12-bit carry select adders; 4-bit ripple carry adders; Braun multiplier; extra stack transistor; low area array multipliers; low power n-bit adders; low power n-bit multiplier; lowest-number-of-transistor 1-bit adders; lowest-number-of-transistor full adders; output voltage levels; power consumption; power dissipation; standard CMOS-28T adder; threshold voltage degradation; Adders; CMOS logic circuits; CMOS technology; Computational modeling; Computer simulation; Degradation; Energy consumption; MOSFETs; Power dissipation; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2005. Canadian Conference on

Conference_Location

Saskatoon, Sask.

ISSN

0840-7789

Print_ISBN

0-7803-8885-2

Type

conf

DOI

10.1109/CCECE.2005.1557317

Filename

1557317