DocumentCode
2763503
Title
Implementation materielle d´un decodeur conceptuel pour l´analyse video MPEG-2 temps reel
Author
Janiaut, Michael ; Tanougast, Camel ; Rabah, Hassan ; Berviller, Yves ; Mannino, Christian ; Weber, Serge
Author_Institution
Fac. des sciences et techniques, Laboratoire cTInstrumentation Electron. de Nancy, Vandoeuvre-les-Nancy
fYear
2005
fDate
1-4 May 2005
Firstpage
1743
Lastpage
1746
Abstract
We have proposed, synthesised an implemented on FPGA a new real time architecture to model the operations of the video stage of a hypothetical decoder T-STD
Keywords
decoding; video coding; FPGA; MPEG-2; T-STD; real time architecture; video decoder; Circuit simulation; Decoding; Delay; Digital video broadcasting; Field programmable gate arrays; Streaming media; Uniform resource locators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2005. Canadian Conference on
Conference_Location
Saskatoon, Sask.
ISSN
0840-7789
Print_ISBN
0-7803-8885-2
Type
conf
DOI
10.1109/CCECE.2005.1557320
Filename
1557320
Link To Document