Modeling 20-nm Germanium FinFET With the Industry Standard FinFET Model

Author

Khandelwal, Sourabh ; Duarte, Juan Pablo ; Chauhan, Yogesh Singh ; Chenming Hu

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of California at Berkeley, Berkeley, CA, USA

Volume

35

Issue

7

fYear

2014

fDate

Jul-14

Firstpage

711

Lastpage

713

Abstract

In this letter, we present modeling results for germanium p-type FinFETs using the industry standard Berkeley Spice Common Multi-gate Field Effect Transistor (BSIM-CMG) model. The effect of perpendicular electrical field on hole mobility in germanium FinFETs is found to be different from silicon FinFETs. We present an updated Ge mobility equation to account for this difference. With this single update, BSIM-CMG agrees very well with the measured I-V data of Ge FinFETs with a gate-length from 130 to 20 nm. We conclude that a production quality standard model is available for simulation of circuits employing p-type Ge FinFET.

Keywords

MOSFET; elemental semiconductors; germanium; hole mobility; semiconductor device models; BSIM-CMG model; Ge; circuit simulation; germanium FinFET modeling; germanium p-type FinFET; hole mobility; industry standard Berkeley Spice common multigate field effect transistor model; industry standard FinFET model; measured I-V data; perpendicular electrical field; production quality standard model; silicon FinFET; size 130 nm to 20 nm; updated germanium mobility equation; FinFETs; Germanium; Integrated circuit modeling; Logic gates; Mathematical model; Semiconductor device modeling; Silicon; BSIM-CMG; FinFETs; Germanium; compact models; compact models.;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2014.2323956

Filename

6823649