DocumentCode
2766352
Title
Real-time 2-D feature detection on a reconfigurable computer
Author
Benedetti, X. ; Perona, P.
Author_Institution
California Inst. of Technol., Pasadena, CA, USA
fYear
1998
fDate
23-25 Jun 1998
Firstpage
586
Lastpage
593
Abstract
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA´s). We envision this device as the front-end of a system able to track image features in real-time control applications like autonomous vehicle navigation. The algorithm employed to select good features is inspired by Tomasi and Kanade´s method. Compared to the original method, the algorithm that we have devised does not require any floating point or transcendental operations, and can be implemented either in hardware or in software. Moreover, it maps efficiently into a highly pipelined architecture, well suited to implementation in FPGA technology. We have implemented the algorithm on a low-cost reconfigurable computer and have observed reliable operation on an image stream generated by a standard NTSC video camera at 30 Hz
Keywords
feature extraction; pipeline processing; real-time systems; reconfigurable architectures; FPGA technology; Field Programmable Gate Arrays; NTSC video camera; feature detection; highly pipelined architecture; reconfigurable computer; Application software; Computer vision; Control systems; Field programmable gate arrays; Hardware; Mobile robots; Navigation; Real time systems; Remotely operated vehicles; Software algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Vision and Pattern Recognition, 1998. Proceedings. 1998 IEEE Computer Society Conference on
Conference_Location
Santa Barbara, CA
ISSN
1063-6919
Print_ISBN
0-8186-8497-6
Type
conf
DOI
10.1109/CVPR.1998.698665
Filename
698665
Link To Document