Abstract :
The following topics are dealt with: interface traps, oxide traps, NBTI, PBTI, advanced CMOS, corona charging, thermal structures, gate oxide, reliability parameters, stress testing, dielectric thin films, charge trapping, MOCVD, stack structures, NPN, transistors, DC device, current mirror method, thermal instability, SOI, BJT, hot carrier, MOSFET, DPN, gate dielectrics, BiCMOS, PMOS, failure mode, SRAM, leakage current, circuit-level stress, inverter, copper dual-damascene interconnect, metal insulator metal capacitors, MIMCAP, memory chips, space applications, tunnel dielectric, ramped current, voltage, DRAM technology, GOI test, plasma charging, power pins, product screening stress, TDDB, HC measurements, PLDD, implant energy optimization, negative bias temperature instability, junction temperature, microelectronic device, dielectric barriers, joule heating, electromigration parameters, aluminium backend, oxide breakdown, magnetoresistive random access memory, MRAM, and product wafers.
