DocumentCode
2769844
Title
Optimal processor-time tradeoffs on massively parallel memory-based architectures
Author
Alnuweiri, Hussein M. ; Kumar, V. K Prasanna
Author_Institution
Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
fYear
1990
fDate
8-10 Oct 1990
Firstpage
278
Lastpage
281
Abstract
Processor-time-optimal algorithms are presented for several image and graph problems on a parallel architecture that combines an orthogonally accessed memory with a linear array structure. The organization has p processors and a memory of size Θ(n 2) locations. The number of processors p can vary over a wide range while providing processor-time-optimal algorithms for sorting and for several problems from graph theory, computational geometry, and image analysis. Sorting and geometric problems can be solved in O ((n 2 /p ) log n +n ) time, which is optimal for p in the range [1, n log n ]. Graph and image problems can be solved in O (n 2/p + n 1/2) time, which is optimal for p in the range [1, n 3/2]. The algorithms implemented on the proposed architecture have processor-time products superior to those of the mesh and pyramid computer algorithms
Keywords
computational complexity; graph theory; parallel algorithms; parallel architectures; computational geometry; graph theory; image analysis; linear array structure; massively parallel memory-based architectures; orthogonally accessed memory; processor-time-optimal algorithms; sorting; Computer architecture; Concurrent computing; Image analysis; Large Hadron Collider; Logic arrays; Memory architecture; Minerals; Petroleum; Radio access networks; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Frontiers of Massively Parallel Computation, 1990. Proceedings., 3rd Symposium on the
Conference_Location
College Park, MD
Print_ISBN
0-8186-2053-6
Type
conf
DOI
10.1109/FMPC.1990.89473
Filename
89473
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