STT-MRAM memory cells with enhanced on/off ratio

Resistive memory technologies are a path to high density, low static power on-chip memories. One such technology, STT-MRAM, exhibits high endurance and is capable of operating as a cache with high write activity. The typically small on/off resistance ratio of the device, however, complicates the sensing process. Two STT-MRAM memory cells are proposed to alleviate this issue. Of the three cells, the diode connected cell increases the resistance ratio by greater than 5x while consuming energy comparable to a standard memory cell during reads.