A processing element for medium grain distributed computing

Processing elements which constitute medium grain distributed computing are usually simple processors rather less complex than a normal microprocessor. The authors present an architecture of such a processing element based on previous work by one of the authors Pacheco, Bavan et al. (1988). These processors can be linked in an array by a bi-directional point to point connection to its nearest neighbours, communicating by sending message packets, and can be linked to a host computer to form a neural computer. The processing element consists of a communication unit, a primitive processing unit and a local memory unit. The communication unit has three memory mapped I/O buffers for receiving and sending a 64-bit message packet and a name register to holds its address. The processor consists of a primitive ALU that supports a reduced instruction set of 16 instructions