A system structure for teraop processing

Describes a massively parallel computing architecture with a network designed to match the needs of structured software, giving priority to locality of software activities, and permitting simultaneous access by massively concurrent I/O transactions. The concept tolerates the limitations of silicon yield, and rationalizes formal proof at the system level. In summary, the architecture presented in the paper comprises many thousands of elementary processors interconnected by simple switching networks that precisely conform in operation to the shape of the structured application software and eliminate pathological faults such as deadlock. Emphasis is placed on logical simplicity and density of packaging rather than component speed the bandwidth being generated by the extensive opportunities concurrent processing. Primary features of the implementation of the machine are concurrent subroutine replications and garbage collection that generate the opportunities for parallel processing while autonomously clearing terminated activities