DocumentCode
2772437
Title
A 2GHz programmable counter with new re-loadable D flip-flop
Author
Do, M.A. ; Yu, X.P. ; Ma, J.G. ; Yeo, K.S. ; Wu, R. ; Zhang, Q.X.
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
fYear
2003
fDate
16-18 Dec. 2003
Firstpage
269
Lastpage
272
Abstract
A high-speed programmable counter with a new re-loadable D Flip-flop which integrates the programmable function to a single true-single-phase-clock (TSPC) D flip-flop is presented. The proposed re-loadable D flip-flop is able to operate at higher frequencies with lower power consumption in comparison to the performance of the existing bitcell. A programmable divide-by-N counter implemented with this re-loadable D flip-flop using the Chartered 0.18 μm CMOS process is capable of operating up to 2 GHz for a 1.8 V supply voltage with 4.7 mW power consumption.
Keywords
BiCMOS digital integrated circuits; counting circuits; flip-flops; frequency dividers; 0.18 micron; 1.8 V; 2 GHz; 4.7 mW; CMOS process; counter; power consumption; programmable counter; programmable function; reloadable D flip-flop; single true single phase clock; supply voltage; CMOS digital integrated circuits; CMOS process; Clocks; Counting circuits; Digital circuits; Energy consumption; Equations; Flip-flops; Frequency conversion; Propagation delay;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2003 IEEE Conference on
Print_ISBN
0-7803-7749-4
Type
conf
DOI
10.1109/EDSSC.2003.1283529
Filename
1283529
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