DocumentCode :
2781191
Title :
Intel First Ever Converged Core Functional Validation Experience: Methodologies, Challenges, Results and Learning
Author :
Bojan, Tommy ; Frumkin, Igor ; Mauri, Robert
Author_Institution :
Israel Design Center, Intel Corp., Haifa
fYear :
2007
fDate :
5-6 Dec. 2007
Firstpage :
85
Lastpage :
90
Abstract :
Intelreg Coretrade microprocessors, including Xeonreg 5100 (codenamed Woodcrest) and Coretrade 2 Duo (code named Conroe and Merom), was the first Intelreg Converged Core product which simultaneously hit all market segments (server, desktop and mobile platforms). A year after these microprocessors have successfully entered the market and significantly improved Intelreg revenues and competitive position, it is time to analyze the post silicon validation experience. This paper discusses the Core processor´s validation challenges, among them were: Very aggressive delivery schedule. The parallel validation of three market segment products within a one year time frame (first silicon to product revenue qualification). Dramatic difference of Coretrade Architecture and micro-architecture from those of Pentiumreg 4 family microprocessors which held the desktop and server market segments for the prior six years. The paper describes the post silicon functional validation methodologies, on both the system validation (SV) and compatibility validation (CV) disciplines, at Intel Corporation as well as original equipment manufacturer (OEM) engagements during the validation cycle. The validation strategy was to quickly ramp up the internal validation capabilities and uncover all silicon issues within Intel Corporation. The overall goal was to preserve the tight OEM partner development cycles from samples to launch. The paper summarizes the major results vs. expectations and key learning for the future products.
Keywords :
DP industry; computer architecture; microprocessor chips; time to market; Core Architecture; Intel Converged Core product; Intel Core microprocessors; Intel Corporation; Pentium 4 family microprocessors; aggressive delivery schedule; compatibility validation; microarchitecture; original equipment manufacturer; post silicon functional validation; product revenue qualification; system validation; Circuits; Computer architecture; Job shop scheduling; Microprocessors; Processor scheduling; Programming profession; Pulp manufacturing; Qualifications; Silicon; Software testing; Core™ 2 Duo; compatibility validation; microprocessor; system validation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microprocessor Test and Verification, 2007. MTV '07. Eighth International Workshop on
Conference_Location :
Austin, TX
ISSN :
1550-4093
Print_ISBN :
978-0-7695-3241-7
Type :
conf
DOI :
10.1109/MTV.2007.20
Filename :
4620156
Link To Document :
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